Xiangchen Meng

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Code Generation & Program Synthesis (1)Data Curation & Synthetic Data (1)Eval Frameworks & Benchmarks (1)

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Yan Tan (1)Tong Liu (1)Yangdi Lyu (1)

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Apr 20, 2026

Yan Tan +3Apr 20, 2026

VerilogCL: A Contrastive Learning Framework for Robust LLM-Based Verilog Generation

LLMs can now generate Verilog code with significantly higher compilation success and functional correctness, outperforming specialized and commercial tools, thanks to a novel contrastive learning approach.

Yan Tan, Tong Liu, Xiangchen Meng +1

Code Generation & Program Synthesis Data Curation & Synthetic Data Eval Frameworks & Benchmarks

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Xiangchen Meng

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Frequent co-authors

Papers (1)