J. Castrillón

Papers on Lattice

Total citations

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Research focus

Code Generation & Program Synthesis (2)Architecture Design (Transformers, SSMs, MoE) (1)Distributed Systems & Hardware (1)Inference & Quantization (1)

Frequent co-authors

Karl F. A. Friebel (1)Jascha A. Ohlmann (1)Jiahong Bi (1)Lars Schutze (1)

Papers (2)

Apr 21, 2026

Going MLIR-native: Demonstrating a Future for DSL compilers on a NumPy-like Example

MLIR's promise for DSL compilers gets real: a fully MLIR-native NumPy-like DSL achieves competitive performance in weather modeling and CFD benchmarks.

Karl F. A. Friebel, Jascha A. Ohlmann, J. Castrillón

Architecture Design (Transformers, SSMs, MoE)Code Generation & Program Synthesis

Feb 12, 2026

Jiahong Bi +2Feb 12, 2026

MING: An Automated CNN-to-Edge MLIR HLS framework

Edge CNNs get a 15-200x speed boost thanks to MING, a new MLIR-based HLS framework that cleverly manages resources on FPGAs.

Jiahong Bi, Lars Schutze, J. Castrillón

Code Generation & Program Synthesis Distributed Systems & Hardware Inference & Quantization

J. Castrillón

Research focus

Frequent co-authors

Papers (2)

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J. Castrillón

Research focus

Frequent co-authors

Papers (2)