Alessio Cicero

Papers on Lattice

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Architecture Design (Transformers, SSMs, MoE) (1)Distributed Systems & Hardware (1)Inference & Quantization (1)

Frequent co-authors

Luigi Altamura (1)Mateo V'azquez Maceiras (1)Mateo Vázquez Maceiras (1)Mohammad Ali Maleki (1)Pedro Trancoso (1)

Papers (1)

Mar 31, 2026

Luigi Altamura +5Mar 31, 2026

SISA: A Scale-In Systolic Array for GEMM Acceleration

LLMs' skewed matrix shapes are leaving your systolic arrays underutilized, but SISA's partitioned architecture offers up to 8.52x speedup and 93% EDP reduction.

Luigi Altamura, Alessio Cicero, Mateo V'azquez Maceiras +3

Architecture Design (Transformers, SSMs, MoE)Distributed Systems & Hardware Inference & Quantization

Alessio Cicero

Research focus

Frequent co-authors

Papers (1)

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Alessio Cicero

Research focus

Frequent co-authors

Papers (1)