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This study investigates the vulnerabilities of edge AI accelerators used for LLM inference by employing laser voltage imaging to extract critical model parameters and intermediate states during execution. The researchers successfully demonstrated the extraction of embeddings, attention mechanisms, and quantized weights from an FPGA-based LLM accelerator, revealing the susceptibility of these systems to physical side-channel attacks. Notably, they established a methodology for recovering asset values even when certain weights or bits are unread, highlighting a significant threat to the security of LLMs deployed in edge environments.
Extracting LLM assets from edge AI chips is feasible through laser voltage imaging, exposing critical vulnerabilities in current deployment practices.
The move of LLM inference to edge AI accelerators introduces new physical vulnerabilities. During execution, model parameters and intermediate inference states are repeatedly loaded into and processed on the chip, making them suscep- tible to physical side-channel attacks. In this work, by deploying laser voltage imaging, we show that one can extract LLM assets during inference, namely embeddings, attention, and quantized MLP weights, activations, and other inference states, from localized memories and compute subcircuits. To validate our claims, we perform an attack on an FPGA-based LLM accelerator. Since such accelerators reuse the same buffers and compute subcircuits across addresses, tiles, modules, and layers, reading asset values comes down to probing different memories during inference. We demonstrate full recovery of the targeted values; however, we also establish a methodology to recover asset values even if some weights or bits remain unread. We further derive lower bounds that relate imaging effort to asset dimensions and show that even direct recovery scales linearly with the size of the targeted asset