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This paper introduces a centralized performance monitoring architecture designed to streamline the collection and analysis of performance data across heterogeneous multicore System-on-Chips (SoCs). By implementing Event Monitoring Units (EVUs) that relay microarchitectural events to an Advanced Performance Monitoring Unit (APMU), the authors address the challenges posed by disparate hardware performance counters in modern embedded systems. The proposed architecture significantly enhances the efficiency of event-driven software mechanisms, as demonstrated through case studies on real-time resource regulation and application profiling in a RISC-V based SoC platform.
A centralized monitoring architecture can drastically simplify performance data collection across diverse hardware components, enhancing real-time system optimization.
Hardware Performance Counters (HPCs) are widely used to enable event-driven software mechanisms such as profile guided optimization, performance analysis, and dynamic resource management in real-time systems. However, in modern embedded System-on-a-Chip (SoCs), different components - including processors, accelerators, interconnects, and memory controllers - typically implement separate and heterogeneous HPC modules. This distributed monitoring infrastructure requires multiple software interfaces and complicates the collection, synchronization, and correlation of performance data across the system. In this work, we propose a centralized performance monitoring architecture to efficiently collect, correlate, and process architectural events across multiple hardware components. Our design introduces Event Monitoring Units (EVUs) that capture and forward microarchitectural events to an Advanced Performance Monitoring Unit (APMU). The APMU integrates programmable counters and a specialized processing element to support flexible, event-driven software mechanisms. We implement our design for an AXI4-based system and integrate it into a RISC-V based SoC platform, which lacks advanced cross-component performance monitoring support. We demonstrate the effectiveness of our approach through case studies on real-time resource regulation, application profiling, and counter attribution.