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CircuitWeave introduces a contract-mediated multimodal framework that enhances the generation of register-transfer level (RTL) code from natural language specifications by integrating schematic diagrams. By explicitly separating and fusing topology and behavior contracts, the framework effectively addresses the challenges of implicit structural relations in text-only inputs, leading to improved code generation accuracy. The results demonstrate significant performance gains on VerilogEval-Human and RTLLM benchmarks, surpassing text-only adaptations by up to 8.46 percentage points in pass rates.
CircuitWeave achieves up to 8.46 percentage points higher RTL generation accuracy by integrating schematic diagrams with natural language specifications through a novel contract-mediated approach.
Text-only LLMs generate RTL from natural-language specifications, but prose can leave connectivity, register boundaries, and state-output relations implicit even when interfaces and cycle-level behavior are specified. Schematics can make these structural relations explicit and thereby complement the behavioral constraints conveyed by text. Yet simply adding an image creates a fusion challenge: direct multimodal decoding does not explicitly separate the evidence roles of text and schematics or make missing and conflicting constraints explicit before code generation.We present CircuitWeave, a contract-mediated multimodal framework that extracts a topology contract from the schematic and a behavior contract from the text. It fuses these records into a circuit contract that serializes correspondences, missing evidence, and conflicts, then generates RTL only from this contract. A joint objective supervises both contracts, serialized fusion, contract-conditioned RTL generation, and reverse reconstruction of covered contract fields from reference RTL.We construct 5,000 executable-qualified packages, each containing a specification, generated schematic, structured contracts, reference RTL, and self-checking testbench, and use the training split to adapt Qwen with LoRA. On VerilogEval-Human, CircuitWeave reaches 46.60% pass@1, 61.49% pass@5, and 65.39% pass@10. These point estimates are 8.46, 5.85, and 2.57 percentage points above those of the same adapted checkpoint without the schematic. On RTLLM, it reaches 40.00%, 48.00%, and 52.00%, two percentage points above the adapted text-only condition at each cutoff.The dataset is publicly available at https://huggingface.co/datasets/fengjiahao0421/CircuitWeave.
