Search papers, labs, and topics across Lattice.
This paper introduces ATLAS, an end-to-end multi-step LLM framework designed for generating functional Successive Approximation Register (SAR) Analog-to-Digital Converters (ADCs) that can pass SPICE simulations. By incorporating expert knowledge to guide the LLM through planning, selection, parameterization, and iterative modification, the framework overcomes the limitations of traditional prompting methods that often lead to hallucinations in circuit design. The results demonstrate the successful generation of SAR ADCs across various technology nodes and specifications, establishing a reliable approach to integrating LLMs into analog design automation.
ATLAS transforms LLMs from unreliable code generators to trusted partners in analog design, successfully producing SAR ADCs that meet rigorous simulation standards.
While Large Language Models (LLMs) have demonstrated significant capability in software code generation, their application to analog Electronic Design Automation (EDA) is bottlenecked. Owing to limited circuit topology understanding and data, directly prompting LLMs and multimodal models leads to hallucinations and failure to produce schematics capable of passing rigorous SPICE simulations, as we show in our work. Instead, we propose an end-to-end, multi-step LLM agentic framework ATLAS, capable of generating a functional Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) that successfully passes simulation validation. To adhere to the rigid constraints of analog design, we utilize expert knowledge to ground the LLM in its planning, selection, parameterization, and iterative modification. As part of ATLAS, we introduce Template-Constrained Generation - which unlike other template-based works - builds towards a more generalized SAR ADC generation flow. We demonstrate a strong proof-of-concept of our framework by developing SAR ADCs across technology nodes and input specs. Overall, our expert-knowledge grounded multi-step agentic ATLAS establishes a pragmatic foundation for integrating LLMs into reliable analog design methodologies.
MIT CSAIL