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This paper introduces ThermoDSE, a novel design space exploration framework that optimally integrates thermal awareness with comprehensive architectural considerations for chiplet-based DNN accelerators. By jointly addressing task modeling, chiplet and core granularity, and critical physical constraints, ThermoDSE significantly enhances performance while adhering to thermal and area limitations. Experimental results demonstrate that ThermoDSE achieves up to 3.5x improvement in Energy-Delay-Inverse-Yield compared to existing methods, along with substantial runtime speedups over traditional optimization techniques.
Achieving a 3.5x boost in Energy-Delay-Inverse-Yield, ThermoDSE redefines the optimization landscape for chiplet-based DNN accelerators under thermal constraints.
Chiplet-based DNN accelerators provide a scalable path to balance performance and yield for modern AI workloads. However, such systems face critical challenges in area and thermal constraints. Design space optimization should jointly consider fine-grained task modeling, chiplet granularity, core granularity, and critical physical constraints. To the best of our knowledge, this is the first framework that involves all these factors. In this work, we propose ThermoDSE, a thermal-aware and comprehensive design space exploration framework for chiplet-based DNN accelerators. ThermoDSE integrates existing fine-grained modeling techniques into a unified simulation and optimization framework that jointly considers architecture design, task orchestration, and inter-chiplet communication under strict thermal and area constraints. Experimental results show that ThermoDSE achieves up to 3.5x improvement in Energy-Delay-Inverse-Yield, defined as E times D times inverse Y, compared with state-of-the-art Simba and other baselines. Furthermore, relative to simulated annealing and reinforcement learning-based methods, ThermoDSE converges to better design points with 3.7x and 29.4x runtime speedups, respectively.
