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This paper introduces StreamingQEC, a system-level simulator designed for streaming quantum error correction (QEC) in tightly integrated quantum-classical systems, addressing the need for resource-efficient management of workloads during logical execution. By employing a discrete-event simulation and an automatic staged-fluid mode, the simulator achieves significant speedups while maintaining accuracy in performance metrics across various configurations. Notably, it demonstrates a 24.0x host-side speedup while preserving a vast number of decoding events, highlighting its potential for optimizing fault-tolerant quantum computing workflows.
Achieving a staggering 24.0x speedup in quantum error correction simulations while maintaining high fidelity opens new avenues for resource-efficient quantum computing.
Fault-tolerant quantum computing requires a continuous hybrid quantum error correction (QEC) pipeline comprising measurement readout, syndrome transport, decoding, feedback, and control. Existing QEC simulators primarily evaluate circuits, noise models, decoders, and protocol-level outcomes. System architects, however, must also understand how these workloads contend for and queue across controller, compute, accelerator, and communication resources during protected logical execution. We introduce StreamingQEC, a system-level simulator that translates fault-tolerant logical workloads into resource-constrained streaming-QEC pipelines. An explicit discrete-event simulation provides the reference execution semantics. An automatic staged-fluid mode enables faster approximate design-space exploration, while a certified recurrence mechanism compresses repeated transitions only when their scheduling state and metric contributions match those of the explicit execution trace. We assemble a decoder-runtime dataset containing 9,998 measurements, of which 8,174 are used to fit performance profiles. Recurrence reproduces the reported explicit-simulation metrics across 35 calibrated-profile configurations, as well as additional workload and cadence validation cases. For a 16-job anchor workload, it preserves 59,743,936 decoding events while achieving a 24.0x host-side speedup, and recurrent simulations scale beyond 1.22 billion events. Across 17 reference configurations, the automatics taged-fluid mode yields a mean makespan error of 2.60% and a worst-case error of 6.45%. Design-space studies reveal transfer-limited resource matching,decoder-driven pipeline stalls, and saturation of dedicated resources under microsecond-scale QEC cycles.