Search papers, labs, and topics across Lattice.
AccelMPC implements an end-to-end hardware-software co-design that integrates an ADMM-based model predictive control (MPC) solver directly onto a custom 6g FPGA board for sub-50g aerial robots. Constrained optimal control on micro-drones has long been bottlenecked by the thermal and compute limitations of embedded microcontrollers, forcing systems to trade control loop frequency for dynamic feasibility. Deployed on a 35g Crazyflie, the system sustains 1 kHz onboard constrained MPC with dynamic obstacle avoidance across 20,000 optimization variables, achieving a 15.6x speedup and a 195.4x reduction in energy-delay product over state-of-the-art embedded baselines.
Full 20,000-variable constrained optimal control can now run at 1 kHz onboard a 35g micro-drone, achieving dynamic obstacle avoidance with a nearly 200x leap in energy-delay efficiency over conventional microcontrollers.
Unlocking the potential of tiny aerial robots requires order of magnitude improvements in the performance of embedded edge control. In particular, although recent cached model predictive control (MPC) solvers can handle the fast system dynamics and complex constraints required for agile drone flight, their computational demands remain prohibitive for resource-constrained robots, forcing prior implementations to operate at reduced control rates. AccelMPC overcomes this challenge through an end-to-end co-design approach that jointly optimizes the solver algorithm, numerical representation, hardware mapping, and physical integration. AccelMPC pairs a co-designed FPGA-accelerated alternating direction method of multipliers (ADMM)-based MPC solver with a custom 6g PCB, providing high-bandwidth communication for deployment on a 35g Crazyflie. Hardware experiments demonstrate 1 kHz onboard constrained MPC with dynamic obstacles, up to 15.6x faster solve times and 195.4x improvement in energy-delay product over state-of-the-art embedded microcontroller-based solvers, all while scaling to optimization problems with over 20,000 optimization variables and a comparable number of constraints. We release our PCB design files, firmware, and FPGA solver code open source.
