Search papers, labs, and topics across Lattice.
This paper critiques the current application of large language models (LLMs) in electronic design automation (EDA) by delineating three hierarchical roles: Generator, Agent, and Orchestrator. It highlights the limitations of existing LLM-based solutions, which often produce plausible code without ensuring physical correctness, and emphasizes the need for a standardized, physics-aware orchestrator to enhance scalability and reliability in hardware design. The authors argue that addressing these issues is crucial for advancing EDA capabilities and ensuring that design decisions are effectively integrated across various stages of the process.
Current LLM applications in EDA risk producing plausible but physically incorrect designs due to a fragmented approach that overlooks the interconnectedness of design stages.
Electronic design automation (EDA) has advanced engineering productivity through successive generations of tooling that progressively automate synthesis, optimisation, and verification. Large language models (LLMs) extend this trajectory by enabling direct translation from design intent to hardware implementations. In most of the EDA literature, LLM-based solutions are typically assisting siloed design stages or tasks, however this obscured the drivers by which capability emerges and systems scale. In this Perspective, we instead define three hierarchical roles that reveal how capability accumulates: a Generator that produces design artifacts in a single pass, an Agent that refines outputs through iterative tool feedback, and an Orchestrator that coordinates decisions across EDA-stages. Across published systems, this reveals a syntax trap in which models are trained to produce plausible code rather than physically correct hardware, compounded by fragmented tools and loss of design context that obscure how decisions affect later stages. Comparisons across the three roles show that current approaches struggle to scale to industrial designs, motivating a shift towards a standardised, physics-aware orchestrator that connects tools and agents across the EDA flow for more reliable and accessible hardware design.