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To mitigate noise compounding in heterogeneous multi-QPU environments without resorting to exhaustive compilation, this work deploys a Graph Neural Network (GNN) to predict circuit fidelity across diverse quantum backends prior to compilation. These fast pre-compilation fidelity predictions feed into a tunable multi-device scheduler that dynamically balances circuit execution accuracy against system throughput. The resulting framework approaches the workload quality of brute-force compilation searches while bypassing the massive classical compute overhead of multi-target synthesis.
Predicting device-specific circuit fidelity before compilation with a fast GNN enables multi-QPU clusters to match brute-force hardware assignment quality without the crippling overhead of compiling across every target machine.
High Performance Computing-Quantum Computing (HPCQC) platforms expose multiple Quantum Processing Units (QPUs) that may differ in size, topology, native gates, and noise characteristics. For current noisy devices, errors compound along the compiled circuits quickly, and minimizing them, that is, maximizing the circuits'execution fidelity, is essential for reliable results. Fidelity depends on the compilation to a specific target device: the same high-level circuit may produce different executables and, therefore, different expected fidelities across QPUs. We present a low-overhead fidelity-aware scheduling framework for multi-QPU systems based on a Graph Neural Network (GNN) that estimates, before compilation, the expected fidelity of each circuit on each available QPU. Then, a tunable scheduler uses these estimates to control the trade-off between execution fidelity and parallelism. Results show that this framework allows for approximating an exhaustive fidelity-based assignment, saving computational resources compared to a brute-force approach that compiles each circuit on every device.