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This study addresses the challenge of predicting the gain of silicon bipolar phototransistors using a hierarchical, uncertainty-aware model tailored for small production datasets. By analyzing real fabrication data across multiple process runs, the authors reveal that approximately 50% of the variance in device gain is attributable to differences between runs rather than within them, highlighting the limitations of traditional recipe-only predictions. The resulting forward gain predictor and inverse recipe search offer significant improvements in predictive accuracy and process optimization, supported by a robust multi-level data-quality assessment framework.
Half of the variance in phototransistor gain comes from differences between production runs, fundamentally challenging traditional predictive models.
The customization, optimization and stabilization of the process flow of a silicon bipolar phototransistor commits months of cleanroom time before a finished device can be measured, so a model that predicts device gain from process parameters before a run has value out of proportion to its accuracy. We study this problem on a real fabrication history, thirteen to fourteen process runs of a single device: a small-sample, hierarchically structured setting unlike the large-corpus regime of conventional virtual metrology. Decomposing the variance of device gain, we find that roughly half of it lies between process runs rather than within them, so recipe-only prediction is bounded by construction. Building on these findings we provide a forward gain predictor with a relative, uncertainty-aware signal, an inverse search that returns recipes for a target gain, and, as the foundation for all of it, a multi-level data-quality assessment tailored to the nested physical entities of fabrication (batch, wafer, die) with an explicit cross-level linkage score. The normalized dataset and analysis code are released for full reproducibility.
