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This paper introduces Microflow, an observability framework that enhances the analysis of microarchitectural events by transforming execution traces into the Microflow Intermediate Representation (MFIR). By capturing dependencies across software semantics, instructions, and hardware resources, Microflow enables direct identification of performance bottlenecks and their root causes, facilitating automated root-cause analysis. The framework reveals previously unobservable phenomena and allows for critical-path decomposition, demonstrating its effectiveness on SPEC CPU 2017 benchmarks by uncovering hidden misprediction costs and cross-loop-iteration contention.
Microflow reveals hidden performance bottlenecks that traditional tools miss, transforming how we analyze hardware-software interactions.
Existing architectural simulators expose aggregate metrics or raw traces, but fail to reveal complex interactions among microarchitectural events and their relationship to program execution. Consequently, architects observe performance symptoms but cannot systematically attribute them to root causes across abstraction layers. This paper introduces Microflow, an observability framework elevating causality to a first-class analytical object. Microflow transforms execution traces into the Microflow Intermediate Representation (MFIR), explicitly capturing dependencies across software semantics, instructions, microarchitectural events, and hardware resources. By unifying these elements, MFIR enables direct traversal from observed stalls to their underlying causes, paving the way for automated root-cause analysis. Microflow precisely attributes stalls, reveals unobservable phenomena, and enables exact critical-path decomposition through counterfactual analysis. These capabilities allow systematic reasoning about complex hardware-software interactions opaque to existing tools. Making causality queryable, Microflow provides a strong foundation for performance analysis and hardware-software co-design. We demonstrate it on two SPEC CPU 2017 benchmarks, uncovering bottlenecks invisible from aggregate symptoms: hidden misprediction costs in leela and cross-loop-iteration contention in mcf.
