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This paper establishes a dynamical constraint for analog computing by introducing a bound on the fastest normalized mode based on the largest combined unity-gain bandwidth (CUGBW) of circuit rows represented by impedance networks. The authors demonstrate that this constraint, akin to the Courant number in numerical methods, limits the operational rates that analog systems can effectively represent and resolve, thereby impacting their performance. Validation through extensive LTspice simulations across various architectures, including CMOS and thermionic vacuum tubes, confirms the theoretical predictions in practical applications like heat equations and graph-based learning problems.
The fastest operational rates in analog computing are fundamentally constrained by the largest combined unity-gain bandwidth, revealing a critical limit on performance that mirrors numerical method restrictions.
This paper identifies a dynamical constraint on analog-computing approaches in which a row of the matrix is represented by an impedance network. It shows that the fastest normalized mode is no more than $2\pi$ times the largest combined unity-gain bandwidth (CUGBW) among all the circuit rows. The CUGBW of a row equals its finite-gain-adjusted unity-gain bandwidth plus the contributions of all rows coupled to it. Each contribution is the square root of the product of the two rows'unity-gain bandwidths multiplied by their coupling conductance and divided by the square root of the product of their total conductance loadings. This bound plays a role analogous to the Courant-number restriction in time-stepping methods by limiting the operator rates that analog hardware can physically represent and resolve at its outputs. The theory is validated using large-scale LTspice simulations across architectures ranging from CMOS to thermionic vacuum-tube circuits. The benchmark circuits implement a one-dimensional heat equation, a graph-based semi-supervised learning problem, and a graph-regularized regression.
