Mohsen Dehghankar

University of Illinois Chicago

Papers on Lattice

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Publication activitypapers/week, last 8 weeks

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Architecture Design (Transformers, SSMs, MoE) (1)Distributed Systems & Hardware (1)Inference & Quantization (1)

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Abolfazl Asudeh (1)

Papers (1)

Mar 29, 2026

3d ago

RSR-core: A High-Performance Engine for Low-Bit Matrix-Vector Multiplication

Ternary LLMs can run up to 62x faster on CPU and 1.9x faster on CUDA with RSR-core, a new engine that finally brings theoretically fast low-bit matrix multiplication to practical hardware.

Mohsen Dehghankar, Abolfazl Asudeh

Architecture Design (Transformers, SSMs, MoE)Distributed Systems & Hardware Inference & Quantization

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Mohsen Dehghankar

Publication activitypapers/week, last 8 weeks

Research focus

Frequent co-authors

Papers (1)