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S. Baranov | Lattice

S. Baranov

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Papers on Lattice

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Publication activitypapers/week, last 8 weeks

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Architecture Design (Transformers, SSMs, MoE) (1)Eval Frameworks & Benchmarks (1)

Frequent co-authors

Samary Baranov (1)D. Gorodecky (1)Danila Gorodecky (1)

Papers (1)

Aug 24, 2026

Thanks:4d ago

SYNTLOG: FSM Benchmarks Evaluation for FPGA

SYNTLOG achieves up to 66% fewer LUTs and synthesizes massive circuits in minutes, while Vivado fails to finish after hours.

S. Baranov, Samary Baranov, D. Gorodecky +1

Architecture Design (Transformers, SSMs, MoE)Eval Frameworks & Benchmarks