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This paper introduces CBM-Dual, a 65nm digital chaotic dynamics processor capable of performing both simulated annealing (SA) and reservoir computing (RC) using a 1024-neuron fully connected chaotic Boltzmann machine (CBM). To reduce computational overhead, the design incorporates a CBM-specific scheduler that exploits low neuron flip rates to minimize multiply-accumulate operations, along with an area-efficient multiply splitting scheme. The fabricated chip achieves significant energy efficiency improvements compared to state-of-the-art implementations in both SA and RC tasks.
A single chip now handles both simulated annealing and reservoir computing with impressive energy efficiency, thanks to a clever scheduling trick that cuts down on unnecessary computations.
This paper presents CBM-Dual, the first silicon-proven digital chaotic dynamics processor (CDP) supporting both simulated annealing (SA) and reservoir computing (RC). CBM-Dual enables real-time decision-making and lightweight adaptation for autonomous Edge AI, employing the largest-scale fully connected 1024-neuron chaotic Boltzmann machine (CBM). To address the high computational and area costs of digital CDPs, we propose: 1) a CBM-specific scheduler that exploits an inherently low neuron flip rate to reduce multiply-accumulate operations by 99%, and 2) an efficient multiply splitting scheme that reduces the area by 59%. Fabricated in 65nm (12mm$^2$), CBM-Dual achieves simultaneous heterogeneous task execution and state-of-the-art energy efficiency, delivering $\times$25-54 and $\times$4.5 improvements in the SA and RC fields, respectively.