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HammerSim, a gem5-based framework, models RowHammer at the full-system level by integrating probability-driven bitflip modeling. This allows for the evaluation of both hardware and software RowHammer mitigations, addressing the limitations of existing simulators in capturing OS effects and cross-layer defenses. Validation against real DDR4 DIMMs using JS divergence demonstrates HammerSim's ability to realistically capture RowHammer behavior and bridge the gap between hardware experiments and architectural simulation.
Simulating RowHammer attacks and defenses at the system level is now possible, offering insights previously inaccessible due to limitations in existing simulation tools.
Modern architecture research relies on simulators to evaluate system security, yet analyzing emerging hardware vulnerabilities like RowHammer requires full-system visibility. As RowHammer vulnerabilities worsen with continuous technology scaling, existing simulators lack the system-level models needed to study complex OS effects and cross-layer mitigations. This tool deficiency leaves modern computing platforms exposed to severe reliability and security risks. In this work, we present HammerSim, a gem5-based framework for modeling RowHammer at the full-system level. HammerSim integrates probability-driven bitflip modeling to realistically capture the behavior of RowHammer. It further enables evaluation of hardware and software mitigations such as TRR and selective ECC. We validate HammerSim's bitflip modeling against real DDR4 DIMMs using JS divergence, demonstrating its utility in studying attacks, defenses, and benign workload susceptibility. Our framework provides an extensible platform to bridge the gap between hardware experiments and architectural simulation.